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Merge branch 'feat/support_esp32p4' into 'master'
Feat/support esp32p4 See merge request speech-recognition-framework/esp-sr!105
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commit
c345acfc5c
@ -4,10 +4,8 @@
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- Available storage is less than the remaining flash space on IDF v5.0.
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If you can not map model partition successfully, please check the left free storage by `spi_flash_mmap_get_free_pages(ESP_PARTITION_MMAP_DATA)` or update IDF to v5.1 or later.
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## To be released
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- Support esp32p4 for WakeNet
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- Support esp32p4 for MultiNet
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- Support esp32p4 for AFE_SR
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## 1.9.0
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- Support esp32p4 for WakeNet, MultiNet and AFE_SR
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## 1.8.0
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@ -1,4 +1,4 @@
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version: "1.8.0"
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version: "1.9.0"
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description: esp_sr provides basic algorithms for Speech Recognition applications
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url: https://github.com/espressif/esp-sr
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dependencies:
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@ -137,7 +137,7 @@ typedef struct {
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.vad_mode = VAD_MODE_3, \
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.wakenet_model_name = NULL, \
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.wakenet_model_name_2 = NULL, \
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.wakenet_mode = DET_MODE_2CH_90, \
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.wakenet_mode = DET_MODE_3CH_90, \
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.afe_mode = SR_MODE_LOW_COST, \
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.afe_perferred_core = 0, \
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.afe_perferred_priority = 5, \
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@ -30,13 +30,6 @@ void check_chip_config(void)
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#ifndef CONFIG_ESP32S3_DATA_CACHE_LINE_64B
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ESP_LOGW(TAG, "Data cache line recommends 64B");
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#endif
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#elif CONFIG_IDF_TARGET_ESP32P4
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#ifndef CONFIG_SPIRAM_SPEED
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ESP_LOGW(TAG, "PSRAM should be enabled and PSRAM freq should be not less than 80MHz");
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#endif
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#ifndef CONFIG_CACHE_L2_CACHE_LINE_128B
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ESP_LOGW(TAG, "It is recommended to set the cache line to 128B");
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#endif
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#elif CONFIG_IDF_TARGET_ESP32
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#ifndef CONFIG_ESP32_DEFAULT_CPU_FREQ_240
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@ -54,8 +47,18 @@ void check_chip_config(void)
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#ifndef CONFIG_ESPTOOLPY_FLASHMODE_QIO
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ESP_LOGW(TAG, "Flash mode should be QIO");
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#endif
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#elif CONFIG_IDF_TARGET_ESP32P4
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#if (! defined CONFIG_ESPTOOLPY_FLASHFREQ_80M)
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ESP_LOGW(TAG, "Flash freq should be 80MHz");
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#endif
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#ifndef CONFIG_SPIRAM_SPEED_200M
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ESP_LOGW(TAG, "PSRAM freq should be 200MHz");
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#endif
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#else
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ESP_LOGW(TAG, "ESP-SR-AFE only support ESP32/ESP32S3/ESP32P4");
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ESP_LOGW(TAG, "ESP-SR-AFE only support ESP32/ESP32S3");
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#endif
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}
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